Design Space Re-Engineering for Power Minimization in Modern Embedded Systems

Power minimization is a critical challenge for modern embedded system design. Recently, due to the rapid increase of system’s complexity and the power density, there is a growing need for power control techniques at various design levels. Meanwhile, due to technology scaling, leakage power has become a significant part of power dissipation in the CMOS circuits and new techniques are needed to reduce leakage power…

1 Introduction
1.1 Low Power Design Challenge in Modern Embedded Systems
1.2 Power Minimization in Embedded System Design Flow
1.3 Design Space Exploration and Re-Engineering
1.3.1 Design Space Exploration
1.3.2 Design Space Re-Engineering
1.4 Thesis Organization
2 General Re-Engineering Methodology and Framework
2.1 A New Design Framework for Low Power
2.2 Re-Constructing the Design Space
2.3 Application
2.3.1 Sequential Logic Synthesis (Chapter 3)
2.3.2 Dual-Vth CMOS Circuit Design (Chapter 4)
2.3.3 Input Vector Control for Static Power Reduction (Chapter 5)
2.3.4 Energy-Efficient Detection Scheme for Wireless Sensor Networks(Chapter 6)
2.4 Summary
3 Power-Driven Sequential Logic Synthesis
3.1 Introduction
3.1.1 A Motivational Example
3.1.2 FSM Re-Engineering
3.2 Related Work
3.3 Preliminary
3.3.1 An Example of Re-constructing FSMs
3.4 Power-Driven FSM Re-Engineering Approach
3.5 FSM Re-engineering Algorithm
3.5.1 A Generic Approach
3.5.2 Genetic Algorithm Based State Duplication
3.5.3 Heuristic on State Selection for Duplication
3.5.4 Heuristic on How to Duplicate a Selected State
3.5.5 Determine the Minimum Switching Activity
3.6 Experimental Results
3.7 Summary
4 Dual-Vth CMOS Circuit Design for Leakage Reduction
4.1 Introduction
4.1.1 A Motivational Example
4.1.2 Main Idea and Contribution
4.1.3 Chapter Organization
4.2 Related Work
4.3 Simultaneous Dual Vt Assignment and Input Vector Selection
4.3.1 Dual Vt Assignment
4.3.2 Input Vector Selection
4.3.3 Combining Dual Vt Assignment and Input Vector Selection
4.3.4 Algorithm Description and Analysis
4.4 Experimental Results
4.5 Summary
5 Gate-Level Input Vector Control for Static Power Minimization
5.1 Introduction
5.2 Related Work
5.3 Leakage Reduction by Gate Replacement
5.3.1 Basic Gate Replacement Technique
5.3.2 A Fast Gate Replacement Algorithm
5.4 Solving the MLV+ Problem
5.4.1 NP-Completeness of the MLV Problem
5.4.2 The MLV+ Problem and Outline of the Divide-and-ConquerApproach
5.4.3 Finding the Optimal MLV for Tree Circuits
5.4.4 Connecting the Tree Circuits
5.4.5 Overhead Analysis
5.5 Experimental Results
5.6 Summary
6 Energy Efficient Detection Scheme for Wireless Sensor Network Design
6.1 Introduction
6.2 Related Work
6.2.1 On Detection in Wireless Sensor Networks
6.2.2 On Energy Efficiency in Sensor Network Design
6.3 System Model
6.4 Hybrid Detection Scheme
6.4.1 Intuition
6.4.2 Detection mechanism
6.4.3 Decision rules
6.4.4 Suboptimal algorithm
6.5 Energy Consumption Model
6.5.1 Data acquisition
6.5.2 Data processing
6.5.3 Communication
6.6 Simulation Results
6.7 Summary
7 Conclusions
A List of Publications

Author: Yuan, Lin

Source: University of Maryland

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